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Muhammad Ali Awan, CISTER Research Center, OH14, E023

Event Date: December 19, 2019 16:15

How to Efficiently and Predictably use Resources in Safety-critical Systems

Abstract - In order to reduce the development time and cost of safety-critical systems the designers are turning towards commercial-of-the-shelf multicore platforms. The goal is achieved by enabling efficient sharing of platform resources, such as CPU cycles, memory bandwidth, and cache lines, among tasks that may have diverse safety levels and resource requirements, where the latter can change over time. 

This talk will present the mapping and scheduling techniques, for CPUs, memories, and caches, along with automatic resource budgeting methods that reduce development time, and schedulability analyses that allow the timing requirements of tasks to be analytically verified. These techniques promote efficient resource usage by considering and managing variations in supply and demand of resources during execution, e.g. in response to a mode-switch in an executing task, or the system as a whole. This may reduce the cost of the platform required to schedule a given task set, or allow more tasks to be scheduled on a given platform.


Bio - Muhammad Ali Awan received his Master's Degree in System on Chip Design from the Royal Institute of Technology (KTH), Sweden in 2007. He completed his PhD with distinction from the University of Porto, Portugal in 2014 under the supervision of Stefan M. Petters in the area of “Real-Time Power Management on Partitioned Multicores”. He worked as a Lecturer at the National University of Science of Technology in Pakistan and as a researcher at IMEC Belgium. He has authored 25+ publications in ISI-indexed journals and prestigious conferences and served as PC member and external reviewer for many reputed conferences (EMSOFT, RTAS, RTSS, RTCSA, DATE, ECRTS and SIES) and top rated Journals (TECS, JSA, RTSJ, TC, TODAES) in the field of real-time systems. Currently, he is a research scientist at the CISTER Research Center and working on the design, implementation and performance analysis of safety-critical systems on a variety of hardware platforms. His research interests include real-time systems, multicore scheduling, mixed-criticality systems, safety-critical systems, energy-aware scheduling, heterogeneous multicore architecture design and exploration, power modelling and resource-aware system optimizations. 



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